Post-doctoral fellow in Embedded Machine Learning at Télécom Paris - CDD 24 month

Job description

Télécom Paris, a founding member of Institut Polytechnique de Paris and a part of IMT (Institut Mines-Télécom), is ranked as one of the top 5 engineering schools in France. Recognized for its invaluable corporate connections, Telecom Paris is an institution with a strong sense of community and international representation. This public higher-education establishment guarantees excellent employability in all sectors and is the leading engineering school for the entire digital spectrum (from hardware to software technology).

With its high-level instruction and innovative pedagogy, Télécom Paris is at the heart of a unique innovation ecosystem which is based on collaborative classroom engagement, an emphasis on project-based training, and multidisciplinary research. Our scientific faculty are affiliated with two key research laboratories; first, the LTCI laboratory, which is recognized by the HCERES as a leading facility in the field of digital sciences and has a remarkable international outreach. And second, the i3 laboratory, Interdisciplinary Institute of Innovation (I3 - UMR 9217 of the CNRS), which carries out multidisciplinary research focused on innovation and in collaboration with the École Polytechnique and Mines ParisTech.

Based in Palaiseau, France at the heart of the Institut Polytechnique campus alongside the École Polytechnique, ENSTA, Télécom Sud Paris and ENSAE, Télécom Paris also has a central-Paris incubator at the epicenter of the French start-up ecosystem.

Télécom Paris is a living laboratory for all the major technological and societal challenges including Artificial Intelligence, Quantum Computing, IoT, Cybersecurity, large-scale digital equipment (Cloud Computing), 5G/6G, and Green IT.


SCIENTIFIC CONTEXT

Machine learning is the key to make sense of the huge amount of data being generated by the sensors. Among the machine learning techniques deep learning neural networks occupy a prominent share thanks to their great success in computer vision, speech and natural language processing tasks.

Due to its huge computing requirement, a major amount these data has to be transferred to the distant cloud servers, which poses a few problems.

  • Response time / high latency
  • Security concerns as private data needs to be transferred to the cloud
  • Intermittent / bad network connection (availability)
  • Some applications have strict latency requirements

To solve the above issues, one solution is to to move computing tasks from cloud to the Edge (close to sensors) also known as Edge Computing or Edge-AI. The types of devices in need of edge computing are: Smartphone, Cameras, Drones, Home assistants, Industrial Equipment, to name a few. Almost all of end user applications are concerned by edge computing, such as Automotive, Consumer Electronics, Healthcare, Manufacturing, Transportation, Robotics.

However computing at the edge has strict constraints such as small form factor, low power consumption, low latency, and innovative solutions are required to make edge computing a reality.

Our project aims to provide a part of that solution through a Silicon IP. We have a working prototype on FPGA which provides the Edge-AI capability and we plan to transform this prototype into Silicon, to achieve better Flops/Watt compared to the FPGA design.


JOB DESCRIPTION

Here at Télécom Paris, we are looking for a machine learning enthusiast with a Hands-On approach and a passion for hardware. This position is targeted at PostDoctoral experience level. (S)He will be working on an exciting prototype chip for embedded machine learning to be fabricated in TSMC 28nm Technology.

The initial assignment is for two years (renewable) and the goal is to transform a FPGA validated design to silicon and optimize it for low power. More info on the FPGA validated design can be found here: Approxitrack ASIC: https://dac-sdc-2021.groups.et.byu.net/doku.php?id=results). Possibility of further renewal.


POSITION RESPONSABILITIES

  • The assignment requires both hardware design and machine learning expertise.
  • A good publication record in important conferences/Journals in this domain is a plus.
  • The post-Doctoral Fellow will work in an international environment in the SSH group at Télécom Paris.
  • The main responsibilities of the job will be to design and maintain our home-grown neural network accelerator.
  • Transform it into an ASIC design in 28nm.
  • Optimization for Low power.
  • Guiding of PhD. And masters students.
  • Teaching assignments if the candidate wishes to do so.

Job requirements

Required skills, experience, and knowledge:

  • FPGA/ASIC design experience

Preferred skills, experience, and knowledge:

  • Familiarity with Linux Command line and scripting are required.

Other abilities and skills:

  • Knowledge of CNN(convolutional Neural Nets)optimization such as pruning/quantization is a plus.


Candidates with the following qualifications may apply

  • PhD or equivalent


APPLICATION INSTRUCTIONS

Applications should be submitted using the following link[MOU1] : URL RECRUIT and include:

- A detailed CV

- A cover letter

- Any element considered useful for the examination of the application


In order to be considered, applications must be received no later than: 01/07/2022


Scientific contact person: sumanta.chaudhuri@telecom-paris.fr

Administrative contact person: hamidou.kone@telecom-paris.fr

Administrative contact person: marion.taldir@telecom-paris.fr


Telecom Paris is an equal-opportunity employer.
All our positions are open to individuals with disabilities.